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rev. 1.2 8/06 copyright ? 2006 by silicon laboratories si2403 patents pending ordering information this data sheet is valid only for those chipset combinations listed on page 63. pin assignments 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 si2403 clkin/xtali xtalo clkout/eecs/a0 d6 vd3.3 gnd vda rts/d7 rxd/rd txd/wr cts/cs reset aout/int int/d0 ri/d1 eesd/d2 vdb gnd vd3.3 c1a esc/d3 dcd/d4 isob eeclk/d5 qe2 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 dct ignd c1b rng1 rng2 qb qe vreg vreg2 ref rext2 rext rx filt filt2 1 si3015 si2403 v.22 bis iso modem ? c hipset with e rror c orrection features applications description the si2403 is a complete, itu-v.22bis-compliant, 2400 bps modem chipset with integrated direct access arrangement (daa) that provides a programmable line interface to meet global telephone line requirements with a single design. available in two small packages, it eliminates the need for a separate dsp data pump, external ram and rom, modem controller, codec, isolation transformer, relays, opto-isolators, and 2- to 4- wire hybrid. the isomodem? chipset is ideal for embedded modem applications due to its small board space, low power consumption, and global compliance. functional block diagram data modem formats itu-t, bell 300 bps up to 2400 bps v.42, mnp2-4 caller id decode 3.3 v power no external rom or ram required uart with flow control at command set support integrated daa over 5000 v capacitive isolation parallel phone detect globally-compliant line interface overcurrent detection fast connect parallel interface call progress support firmware upgradeable set-top boxes e-mail terminals point-of-sale terminals digital video recorders security systems remote monitoring serial interface parallel interface microcontroller dsp daa interface ram/rom pll clocking si3015 clkin/xtali xtalo clkout rxd txd cts rts dcd esc ri int reset c1a to phone line aout data bus cs wr rd a0 d0-d7 isob
si2403 2 rev. 1.2
si2403 rev. 1.2 3 t able of c ontents section page 1. electrical specificat ions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4 2. typical application schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 3. bill of materials: si2403 ch ipset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 4. functional description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .16 4.1. digital interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .16 4.2. serial interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .16 4.3. parallel interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 4.4. command mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .17 4.5. data mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .17 4.6. fast connect . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 4.7. clocking/low-power modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 4.8. error correction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 4.9. wire mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .18 4.10. caller id operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .18 4.11. parallel phone detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 4.12. overcurrent detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 4.13. global operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 4.14. firmware upgrades . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .20 4.15. eeprom interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 4.16. at commands . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .20 4.17. extended at co mmands . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 5. s-registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 6. user-access registers (u-reg isters) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 6.1. bit-mapped u-regist er de tail (defaults in bold) . . . . . . . . . . . . . . . . . . . . . . . . . . . .41 7. parallel interface registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58 8. pin descriptions: si2403 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60 9. pin descriptions: si3015 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62 10. ordering guide . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64 11. package outline: 24-pi n tssop . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65 12. package outline: 16-pin soic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66 document change list . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67 contact information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .68
si2403 4 rev. 1.2 1. electrical specifications table 1. recommended operating conditions parameter 1 symbol test condition min 2 typ max 2 unit ambient temperature t a k-grade, f-grade 0 25 70 c si2403 supply voltage, digital 3 v d 3.0 3.3 3.6 v notes: 1. the si2403 specifications are guaranteed when the typical application circ uit (including component tolerance) and any si2403 and any si3015 are used. see "typical application schematic" on page 11. 2. all minimum and maximum specifications are guaranteed and apply across the recommended operating conditions. typical values apply at nominal supply voltages and an operating temperature of 25 c unless otherwise stated. 3. the digital supply, v d , operates from 3.0 to 3.6 v. th e si2403 interface supports 5 v logic (clkin/xtali supports 3.3 v logic only).
si2403 rev. 1.2 5 table 2. daa loop characteristics (v d = 3.0 to 3.6 v, t a = 0 to 70 c for k-grade ) parameter symbol test condition min typ max unit dc termination voltage v tr i l =20ma, act 1 =1 dct = 11 (ctr21) ??7.5v dc termination voltage v tr i l = 42 ma, act = 1 dct = 11 (ctr21) ? ? 14.5 v dc termination voltage v tr i l = 50 ma, act = 1 dct = 11 (ctr21) ??40 v dc termination voltage v tr i l = 60 ma, act = 1 dct = 11 (ctr21) 40 ? ? v dc termination voltage v tr i l = 20 ma, act = 0 dct = 01 (japan) ??6.0v dc termination voltage v tr i l = 100 ma, act = 0 dct = 01 (japan) 9??v dc termination voltage v tr i l = 20 ma, act = 0 dct = 10 (fcc) ??7.5v dc termination voltage v tr i l = 100 ma, act = 0 dct = 10 (fcc) 9??v on-hook leakage current i lk v tr =?48v ? ? 7 a operating loop current i lp fcc/japan modes 13 ? 120 ma operating loop current i lp ctr21 13 ? 60 ma dc ring current 2 dc flowing through ring detection circuitry ?? 7 a ring detect voltage 3 v rd rt = 0 11 ? 22 v rms ring detect voltage 3 v rd rt = 1 17 ? 33 v rms ring frequency f r 15 ? 68 hz ringer equivalence number 4 ren ? ? 0.2 notes: 1. act = u67, bit 5; dct = u67, bits 3:2; rt = u67, bit 0; rz = u67, bit 1. 2. r25 and r26 installed. 3. the ring signal is guaranteed to not be detected below t he minimum. the ring signal is guaranteed to be detected above the maximum. 4. c15, r14, z2, and z3 not installed. rz = 0.
si2403 6 rev. 1.2 figure 1. test circuit for loop characteristics table 3. dc characteristics, v d =3.3v (v d = 3.0 to 3.6 v, t a = 0 to 70 c for k-grade) parameter symbol test condition min typ max unit high level input voltage v ih 2.0 ? ? v low level input voltage v il ??0.8v high level output voltage v oh i o =?2ma 2.4 ? ? v low level output voltage v ol i o = 2 ma ? ? 0.35 v input leakage current i l ?10 ? 10 a pullup resistance pins 3, 4, 9, 11, 13, 14, 16, 23, 24 r pu 50 100 200 k total supply current * i d v d33 pin ? 26 35 ma total supply current, powerdown * i d pdn = 1 ? 80 ? a *note: all inputs at 0 or v d . all inputs held static except clock, and all outputs unloaded (static i out =0ma). si3015 tip ring 10 f 600 i l v tr + ?
si2403 rev. 1.2 7 table 4. daa ac characteristics (v d = 3.0 to 3.6 v, t a = 0 to 70 c for k-grade) parameter symbol test condition min typ max unit sample rate fs ? 9.6 ? khz crystal oscillator frequency f xtl ?4.9152? mhz transmit frequency response low ?3 dbfs corner ? 5 ? hz receive frequency response low ?3 dbfs corner ? 5 ? hz transmit full scale level 1 v fs ?1?v peak receive full scale level 1 v fs ?1?v peak dynamic range 2,3,4 dr act 5 = 0, dct 5 = 10 (fcc) i l =100ma ?82?db dynamic range 2,3,6 dr act = 0, dct = 01 (japan) i l =20ma ?83?db dynamic range 2,3,4 dr act = 1, dct = 11(ctr21) i l =60ma ?84?db transmit total harmonic distortion 4,7 thd act = 0, dct = 10 (fcc) i l =100ma ??85?db transmit total harmonic distortion 5,7 thd act = 0, dct = 01 (japan) i l =20ma ??76?db receive total harmonic distortion 6,7 thd act = 0, dct = 01 (japan) i l =20ma ??74?db receive total harmonic distortion 4,7 thd act = 1, dct = 11 (ctr21) i l =60ma ??82?db aout dynamic range vin = 1 khz ? 40 ? db aout thd vin = 1 khz ? 40 ? db aout full-scale level ? 0.7v dd ?v pp aout mute level ? 60 ? db notes: 1. measured at tip and ring with 600 termination at 1 khz. 2. dr = 20 x log |vin| + 20 x log (rms signal/rms noise). 3. measurement is 300 to 3400 hz. applies to transmit and receive paths. 4. vin = 1 khz, ?3 dbfs, fs = 10300 hz. 5. act = u67, bit 5; dct = u67, bits 3:2. 6. vin = 1 khz, ?6 dbfs, fs = 10300 hz. 7. thd = 20 x log (rms distortion/rms signal).
si2403 8 rev. 1.2 table 5. absolute maximum ratings parameter symbol value unit dc supply voltage v d 4.1 v input current, si2403 digital input pins i in 10 a digital input voltage v ind ?0.3 to 5.3 v clkin/xtali input voltage v xind ?0.3 to (v d + 0.3) v operating temperature range t a ?10 to 100 c storage temperature range t stg ?40 to 150 c note: permanent device damage may occur if the above absolute maximum ratings are exceeded. functional operation should be restricted to the conditions as specified in the operational sections of this data sheet. exposure to absolute maximum rating conditions for extended periods may affect device reliability. table 6. switching characteristics (v d = 3.0 to 3.6 v, t a = 0 to 70 c for k-grade) parameter symbol min typ max unit clkout output clock frequency 2.4576 ? 39.3216 mhz baud rate accuracy t bd ?1 ? 1 % cts or rts high to start bit t rts 10 ? ? ns reset to reset t rs 5.0 ? ? ms reset to 1st at command t at 300 ? ? ms address setup t as 15 ? ? ns address hold t ah 0??n s wr low pulse width t wl 50 ? ? ns write data setup time t wdsu 20 ? ? ns write cycle time t wc 120 ? ? ns chip select setup t css 10 ? ? ns chip select hold t csh 0??n s rd low pulse width t rl 50 ? ? ns rd low to data driven time t rldd ?? 2 0n s data hold t dh 10 ? ? ns rd high to hi-z time t dz ?? 3 0n s read cycle time t rc 120 ? ? ns note: all timing is referenced to the 50% level of the waveform. input test levels are v ih =v d ? 0.4 v, v il =0.4v
si2403 rev. 1.2 9 figure 2. asynchronous uart seri al interface ti ming diagram uart time for modem receive path (8n1 mode) uart timing for modem transmit path (9n1 mode with 9th bit escape) 8-bit data mode d0 d1 d2 d3 d4 d5 d6 d7 d0 d1 d2 d3 d4 d5 d6 esc d7 stop stop start start t rts t rth rts cts rx tx t rts t cth 9-bit data mode
si2403 10 rev. 1.2 figure 3. parallel interface read timing figure 4. parallel interface write timing t csh t css t as t ah address = 0 or 1 t rl t rc t rldd t dh t rldd valid data valid data a0 d[7:0] cs rd t dz t csh t css t as t ah t wc t wl address = 0 or 1 t wdsu t dh valid data valid data a0 d[7:0] cs wr
si2403 rev. 1.2 11 2. typical application schematic rtsb/d7 rxd/rdb txd/wrb ctsb/csb resetb d6 clkout/eecs/a0 eeclk/d5 dcdb/d4 esc/d3 aout/intb intb/d0 rib/d1 eesd/d2 ring tip vcc note 1: r12, r13 and c14 are only required if complex ac termination is used (act bit = 1). note 2: see "ringer impedance" section for optional czech r epublic support. note 3: see "billing tone immunity" section for optional billing tone filter (germany, switzerland, south africa). decoupling caps for u1 vd note 5: l1,l2, c38, c39, r31, r32 are for en 55022/c ispr-22 conducted distur bance compliance. note 4: r27, r28, d3, d4, z4, z5, rv2 may be populated for enhanced lightning option. refer to an48 for layout guidelines please submit lay out to silicon labs for review prior to pcb fabrication. d3 rv2 q3 c3 r10 d1 z5 c39 rv1 c36 r32 c22 r28 c38 u2 si3015 tsta/qe2 1 tstb/dct 2 ignd 3 c1b 4 rng1 5 rng2 6 qb 7 qe 8 vreg 9 nc/vreg2 10 nc/ref 11 dct/rext2 12 rext 13 rx 14 nc/filt 15 tx/filt2 16 r31 r19 r16 fb1 l1 r17 fb2 r9 z4 c37 + c5 r11 y1 1 2 r6 q1 c16 d2 r5 c4 r12 c13 r18 c30 c26 c18 r2 c27 r25 c20 c1 q2 r26 c19 r13 c10 z1 + c14 r8 c25 r7 c7 r15 c24 r24 c9 r27 u1 si24 03 clkin/xtali 1 xtalo 2 clkout/eecs/a0 3 d6 4 vd3.3 5 gnd 6 vda 7 rts/d7 8 vdb 17 gnd 18 vd 3.3 19 isob 20 c1a 21 esc/d3 22 dcd/d4 23 eeclk/d5 24 cts/cs 11 rxd/rd 9 txd/wr 10 reset 12 ri/d1 15 eesd/d2 16 aout/int 13 int/d0 14 q4 c8 c35 + c12 c6 l2 d4
si2403 12 rev. 1.2 3. bill of materials: si2403 chipset component value supplier(s) c1,c4 1 150 pf, 3 kv, x7r, 20% novacap, venkel, johanson, murata, panasonic c3,c13,c35,c36 0.22 f, 16 v, x7r, 20% novacap, venkel, johanson, murata, panasonic c5 2 0.1 f, 50 v, elec/tant, 20% venkel, johanson, murata, panasonic c6,c10,c16,c37 0.1 f, 16 v, x7r, 20% novacap, venkel, johanson, murata c7,c8 3 560 pf, 250 v, x7r, 20% novacap, venkel, johanson, murata, panasonic c9 22 nf, 250 v, x7r, 20% novacap, venkel, johanson, murata, panasonic c12 1.0 f, 16 v, tant, 20% venkel, panasonic c14 2 0.68 f, 16 v, x7r/elec/tant, 20% novacap, venkel, aux, murata, panasonic c18,c19 3 3.9 nf, 16 v, x7r, 20% novacap, venkel, johanson, murata c20 0.01 f, 16 v, x7r, 20% novacap, venkel, johanson, murata c22 4 1800 pf, 50 v, x7r, 20% not installed c24,c25 1 1000 pf, 3 kv, x7r, 10% novacap, venkel, johanson, murata, panasonic c26,c27 33 pf, 16 v, npo, 5% novacap, venkel, johanson, murata c30 4 10 pf, 16 v, npo, 10% not installed c38,c39 2,5 47 pf, 16 v, x7r, 10% venkel d1,d2 6 dual diode, 300 v, 225 ma central semiconductor d3,d4 1 bav99 dual diode, 70 v, 350 mw diodes inc., onsemiconductor, fairchild fb1,fb2 ferrite bead, 600 , 25%, 200 ma murata l1,l2 2,5 68 h, 120 ma, 4 max, 10% murata, panasonic q1,q3 a42, npn, 300 v onsemiconductor, fairchild, zetex q2 a92, pnp, 300 v onsemiconductor, fairchild, zetex q4 7 bcp56, npn, 60 v, 1/2 w onsemiconductor, fairchild rv1 sidactor, 275 v, 100 a teccor, st microelectronics, microsemi, ti notes: 1. the si2403 design survives up to 3500 v longitudinal surges without r27, r28, d3, d4, z4, and z5. adding the r27, r28, d3, d4, z 4, and z5 enhanced lightning options increases lo ngitudinal surge survival to greater t han 6600 v. the isolation capacitors, c1, c4 , c24, and c25, must also be rated to greater than the surge voltage. y-class capacitors are reco mmended for highest surge survival. 2. for fcc-only designs, c14, c38, c39, r12, r13, r31, and r32 are not required (leave si3015 pin 12 unconnected); l1 and l2 may be replaced with a short; r2 may be 5%; with z1 rated at 18 v, c5 may be rated at 16 v; also see note 9. 3. if the auto answer, ring detect, and caller id features are not used, r9, r10, c7, and c8 may be removed. 4. c22 and c30 may provide an additional improvement in emis sions/immunity, depending on design and layout. population option recommended. see ?an70: si2456/si2433/si2414/si24 03 modem designer?s guide? for details. 5. compliance with en55022 and/or cispr-22 conduc tance disturbance tests requires the following: l1, l2, c38, c39, r31, and r32; d1 and d2 must be 400 v rated, and rv2 must be populated. see also ?en55022 and cispr-22 compliance? in ?an70: si2456/ si2433/si2414/si2403 modem designer?s guide?. 6. several diode bridge configurations are accept able (suppliers include gener al semi., diodes inc.) 7. q4 may require copper on board to meet 1/2 w power requirement. (contact manufacturer for details.) 8. rv2 can be installed to improve perform ance for multiple longitudinal surges. 9. the r7, r8, r15, and r16, r17, r19 resistors ma y each be replaced with a single resistor of 1.78 k , 3/4 w, 1%. for fcc-only designs, 1.78 k , 1/16 w, 5% resistors may be used. 10. if the parallel phone detection feature is not used, r25 and r26 may be removed. 11. to ensure compliance with itu specifications, frequency toler ance must be less than 100 ppm including initial accuracy, 5-year a ging, 0 to 70 c, and capacitive loading. crystals with 50 ppm initial accuracy typically satisfy this requirement.
si2403 rev. 1.2 13 rv2 5,8 270 v, mov not installed r2 2 402 , 1/16 w, 1% venkel, panasonic r5 100 k , 1/16 w, 1% venkel, panasonic r6 120 k , 1/16 w, 5% venkel, panasonic r7,r8,r15,r16,r17,r19 9 5.36 k , 1/4 w, 1% venkel, panasonic r9,r10 3 56 k , 1/10 w, 5% venkel, panasonic r11 9.31 k , 1/16 w, 1% venkel, panasonic r12 2 78.7 , 1/16 w, 1% venkel, panasonic r13 2 215 , 1/16 w, 1% venkel, panasonic r18 2.2 k , 1/10 w, 5% venkel, panasonic r24 150 , 1/16 w, 5% venkel, panasonic r25, r26 10 10 m , 1/16 w, 5% venkel, panasonic r27, r28 1 10 , 1/10 w, 5% venkel, panasonic r31, r32 2,5 470 , 1/16 w, 5% venkel, panasonic u1 si2403 silicon labs u2 si3015 silicon labs y1 4.9152 mhz, 20 pf, 100 ppm 11 , 150 esr not installed z1 1 zener diode, 43 v, 1/2 w vishay, onsemiconductor, rohm z4,z5 1 zener diode, 5.6 v, 1/2 w vishay, onsemiconductor, rohm component value supplier(s) notes: 1. the si2403 design survives up to 3500 v longitudinal surges without r27, r28, d3, d4, z4, and z5. adding the r27, r28, d3, d4, z 4, and z5 enhanced lightning options increases lo ngitudinal surge survival to greater t han 6600 v. the isolation capacitors, c1, c4 , c24, and c25, must also be rated to greater than the surge voltage. y-class capacitors are reco mmended for highest surge survival. 2. for fcc-only designs, c14, c38, c39, r12, r13, r31, and r32 are not required (leave si3015 pin 12 unconnected); l1 and l2 may be replaced with a short; r2 may be 5%; with z1 rated at 18 v, c5 may be rated at 16 v; also see note 9. 3. if the auto answer, ring detect, and caller id features are not used, r9, r10, c7, and c8 may be removed. 4. c22 and c30 may provide an additional improvement in emis sions/immunity, depending on design and layout. population option recommended. see ?an70: si2456/si2433/si2414/si24 03 modem designer?s guide? for details. 5. compliance with en55022 and/or cispr-22 conduc tance disturbance tests requires the following: l1, l2, c38, c39, r31, and r32; d1 and d2 must be 400 v rated, and rv2 must be populated. see also ?en55022 and cispr-22 compliance? in ?an70: si2456/ si2433/si2414/si2403 modem designer?s guide?. 6. several diode bridge configurations are accept able (suppliers include gener al semi., diodes inc.) 7. q4 may require copper on board to meet 1/2 w power requirement. (contact manufacturer for details.) 8. rv2 can be installed to improve perform ance for multiple longitudinal surges. 9. the r7, r8, r15, and r16, r17, r19 resistors ma y each be replaced with a single resistor of 1.78 k , 3/4 w, 1%. for fcc-only designs, 1.78 k , 1/16 w, 5% resistors may be used. 10. if the parallel phone detection feature is not used, r25 and r26 may be removed. 11. to ensure compliance with itu specifications, frequency toler ance must be less than 100 ppm including initial accuracy, 5-year a ging, 0 to 70 c, and capacitive loading. crystals with 50 ppm initial accuracy typically satisfy this requirement.
si2403 14 rev. 1.2 table 7. protocol characteristics item specification data rate 2400 bps 1200 bps 300 bps 300 bps itu-t v.22bis itu-t v.22bis, v.23, or bell 212a itu-t v.21 bell 103 data format bit asynchronous selectable 8, 9, 10, or 11 bits per character compatibility v.23, v.22bis, v.22 , v.21, bell 212a, and bell 103 operating mode switched network two-wire full-duplex data modulation 2400 bps 1200 bps 0 to 300 bps 16-level qam/600 baud 0.01% 4-level psk/600 baud 0.01% fsk 0?300 baud 0.01% answer tone itu-t v.22bis, v.22, and v.21 modes bell 212a and 103 modes 2100 hz 3 hz 2225 hz 3 hz transmit carrier itu-t v.22, v.22bis/bell 212a originate mode answer mode itu-t v.21 originate mode answer mode bell 103 originate mode answer mode 1200 hz 0.5 hz 2400 hz 1 hz mark (980 hz 12 hz) space (1180 hz 12 hz) mark (1650hz 12hz) space (1850hz 12hz) mark (1270hz 12hz) space (1070hz 12hz) mark (2225hz 12hz) space (2025hz 12hz) output level permissive?switched network ?9 dbm maximum receive carrier itu-t v.22, v.22bis/bell 212a originate mode answer mode itu-t v.21 originate mode answer mode bell 103 originate mode answer mode 2400 hz 7 hz 1200 hz 7 hz mark (1850hz 12hz) space (1650hz 12hz) mark (1850hz 12hz) space (1650hz 12hz) mark (2225hz 12hz) space (2025hz 12hz) mark (1270hz 12hz) space (1070hz 12hz)
si2403 rev. 1.2 15 carrier detect (level for itu-t v.22bis, v.22, v.21, 212, 103) in switched network acquisition (?43 dbm) release (?48 dbm) hysteresis 2 dbm minimum dte interface eia/tia-232-e (itu-t v.24/v.28/iso 2110) line equalization automatic adaptive connection options loss of carrier in itu-t v.22bis and lower phone types 500 (rotary dial), 2500 (dtmf dial) dialing pulse and tone dtmf output level per part 68 pulse dial ratio make/break: 39/61% ring cadence on 2 seconds; off 4 seconds call progress monitor busy connect (rate) no carrier no dialtone ok ring ringing table 7. protocol characteristics (continued) item specification
si2403 16 rev. 1.2 4. functional description the isomodem? chipset is a complete embedded- modem chipset with integrated direct-access arrangement (daa) that provides a programmable line interface to meet global telephone line requirements. available in two small packag es, this solution includes a dsp data pump, a modem controller, on-chip ram and rom, an analog front end (afe), a daa, and analog output. the si2403 accepts standard modem at commands and provides connect rates up to 2400 bps full-duplex over the public switched telephone network (pstn). the si2403 features a complete set of modem protocols including all itu-t standard formats up to 2400 bps. the si2403 provides numerous additional features for embedded modem applications. the modem includes full caller id detection and decoding for global standards. call progress is supported through echoing result codes and is also programmable to meet global settings. because the si2403 integrates the daa, analog features, such as parallel phone detect, overcurrent detection, and global ptt compliance with a single design, are included. this device is ideal for embedded modem applications due to its small board space, low power consumption, and global compliance. the si2403 solution includes a silicon daa using silicon laboratories? proprietary capacitive isolation technol ogy. this highly-integrated daa can be programmed to meet worldwide ptt specifications for ac termi nation, dc termination, ringer impedance, and ringer threshold. in addition, the si2403 has been designed to meet the most stringent worldwide requirements for out-of-band energy, billing-tone immunity, lightning surges, and safety requirements. the si2403 is designed to be rapidly incorporated into existing modem applications . the device interfaces directly through either a serial uart to a microcontroller or to a pc through a standard rs-232 transceiver. this interface allows for pc evaluation of the modem immediately upon powerup via the at commands using standard terminal software. the si2403 also provides an 8-bit parallel port. the si2403 solution requires only a few low-cost discrete components to achieve global compliance. see "typical application schematic" on page 11. 4.1. digital interface the isomodem chipset digital i/o can be configured as either a serial uart interface with flow control or as a parallel 8-bit interface. selection of a serial or parallel i/o interface is determined by the state of aout/int (si2403, pin 13) during the rising edge of reset . an internal pullup resistor forces the default state to serial mode operation. an external 10 k pulldown resistor can be connected to aout/int to force selection of parallel mode. additionally, when selecting parallel mode, cs should remain high until after the rising edge of reset . configuration of pins 3, 4, 8?11, 13?16, and 22?24 is determined by this interface selection. 4.2. serial interface the isomodem chipset supports data terminal equipment (dte) rates up to 307.2 kbps with the standard serial uart format. upon powerup, the uart defaults to a 19.2 kbps baud rate. if a pulldown resistor 10 k is placed between d2 (si2403, pin 16) and gnd (si2403, pin 6), the dte rate is set by the autobaud feature after reset. the serial interface also pr ovides a hardware pin, dcd (data carrier detect), which remains low as long as the si2403 is connected. the int interrupt pin can be programmed to alert the host of changes to the interrupts listed in i/o control 0 (u70). 4.2.1. autobaud the isomodem chipset includes an automatic baud rate detection feature that allows the host to start transmitting data at any standard dte rate from 300 bps to 307.2 kbps. this feature is enabled by placing a pulldown resistor < 10 k between d2 (pin 16) and gnd. 4.3. parallel interface the parallel interface is an 8-bit data bus with a single bit address. figure 3 on page 10 shows the required timing for the parallel interface. if a0 = 0, the data bus represents a read/write to the ?parallel interface 0 (0x00)? register on page 57. if a0 = 1, the data bus represents a read/write to the ?parallel interface 1 (0x01)? register on page 58).
si2403 rev. 1.2 17 4.4. command mode upon reset, the isomodem? chipset is in command mode and accepts ?at? commands. an outgoing modem call can be made using the ?atdt#? (tone dial) or ?atdp#? (pulse dial) command after the device is configured. if the handshake is successful, the modem responds with the response codes detailed in table 12 on page 32 and enters data mode. 4.5. data mode the isomodem chipset is in data mode while it has a connection to another modem or is in the process of establishing a connection. in command and data mode, the si2403 operates in asynchronous dte mode only. data protocols are available to provide error correction to improve reliability (v.42 and mnp2-4). each connection between two modems in data mode begins with a handshakin g sequence. during that sequence, the modems determine the line speed, data protocol, and related parameters for the data link. configuration through at commands determines the range of choices available to the modem during the negotiation process. 4.6. fast connect the isomodem chipset supports a fast connect mode of operation to reduce the time of a connect sequence in originate mode. the fast connect modes can be enabled for v.21, v.22, v.22bis, bell103, and bell212. in addition, the si2403 may be set to either default asynchronous data communications equipment (dce) mode or a transparent hdlc synchronous mode. 4.7. clocking/low-power modes the isomodem chipset contains an on-chip phase- locked loop (pll) and clock generator. using either a single crystal or master clock input, the si2403 can generate all the internal clocks required to support the featured modem protocols. either a 4.9152 mhz clock (3.3 v max input?see table 5 on page 8) on xtali or a 4.9152 mhz crystal across xt ali and xtalo form the master clock (100 ppm max) for the si2403. this clock source is sent to an inte rnal pll that generates all necessary internal system clocks including the dsp clock. figure 5 shows a block diagram of how the dsp clock and the clkout are derived. using the s24 s-register, the si2403 can be set to automatically enter sleep mode after a pre-programmed time of inactivity with either the dte or the remote modem. the sleep mode is entered after (s24) seconds have passed since the tx fifo has been empty. the si2403 remains in the sleep state until either a 1 to 0 transition on txd (serial mode) or a 1 to 0 transition on cs (parallel mode) occurs. additionally, the si2403 may be placed in a complete powerdown mode. comp lete powerdown is accomplished via u65[13] (pdn). once the pdn bit is written, the si2403 complete ly powers down and can only be powered back on via the reset pin. a 78.6432 mhz/(r1 + 1) clock is produced on the clkout pin that may be used as an external system clock. r1 may be programmed via u5e to any value between 1 and 31 (default value = 31). figure 5. dsp and clkout generation (r1 + 1) 78.6432 mhz pll to internal clocking 1 < r1 < 31 4.9152 mhz clkin (pin 1) clkout (pin 3)
si2403 18 rev. 1.2 4.8. error correction the isomodem? chipset can employ error-correction (reliable) protocols to ensure error-free delivery of asynchronous data sent between the host and the remote end. the si2403 supports v.42 and mnp2-4 error correction protocols. v.42 (lapm) is most commonly used and is enabled by default. 4.9. wire mode wire mode is used to communicate with standard non- error correcting modems. w hen optioned with \n3, the isomodem chipset falls back to wire mode if it fails in an attempt to negotiate a v.42 or mnp link with the remote modem. error correction is not active in wire mode. 4.10. caller id operation the isomodem chipset supports full type 1 caller id detection and decode for the us bellcore, european etsi, uk, and japanese caller id protocols. caller id is enabled via the +vcid and +vcdt commands. 4.11. parallel phone detection the isomodem chipset is able to detect when another telephone, modem, or other device is using the phone line. this allows the host to avoid interrupting another phone call when the phone line is already in use and to intelligently handle an interruption when the si2403 is using the phone line. 4.11.1. on-hook line -in-use detection when the isomodem chipset is sharing the telephone line with other devices, it is im portant that it not interrupt a call in progress. to detect whether another device is using the shared telephone line, the host can use the si2403 to monitor the tip-ring dc voltage with the lvcs (line voltage and current sense) register (u79, bits 4:0). see figure 6 on page 19 . see also the %vn commands for automatic line-in-use detection. 4.11.2. off-hook intrusion detection when the isomodem chipset is off-hook, an algorithm is implemented in the si2403 to automatically monitor the tip-ring loop current via the lvcs register. when the si2403 is off-hook, the lvcs register switches from representing the tip-ring voltage to representing the tip-ring current. (see figure 7 on page 19 .) upon detecting an intrusion, the si2403 alerts the host to the condition via the int pin.
si2403 rev. 1.2 19 figure 6. loop voltage figure 7. loop current 0 3 6 9 12 15 18 21 24 28 30 33 36 39 42 45 47 51 54 57 60 63 66 69 72 100 0 5 75 78 81 84 87 lvc s bits loop voltage (v) 10 15 20 25 30 0 3 6 9 1215182124 30333639 424548515457 60636669 72 140 75 78 81 84 87 90 93 loop current (ma) lvcs bits 27 overload 0 5 10 15 20 25 30 ctr21 only
si2403 20 rev. 1.2 4.12. overcurrent detection the isomodem? chipset includes an overcurrent detection feature that measur es the loop current at a programmable time after the si2403 goes off-hook. this allows the si2403 to detect if it is connected to an improper telephone line. the overcurrent detection feature may be enabled by setting the ocdm bit (u70, bit 11). oht (u77, bits 8:0) sets the delay after off-hook until the loop current is measured. 4.13. global operation the isomodem chipset contai ns an integrated silicon direct-access arrangement (silicon daa) that provides a programmable line interface to meet international telephone line interface requirements. ?an70: si2456/ si2433/si2414/si2403 modem designer?s guide? gives the daa register settings required to meet international ptt standards. additionally, the user-access registers (via the at:u and at:r commands) may be programmed for country- specific settings, such as dial tone, ring, ringback, and busy tone. see an70 for complete details. 4.14. firmware upgrades the isomodem chipset contains an on-chip program rom that includes the firmware required for the features listed in this data sheet. in addition, the si2403 contains on-chip program ram to accommodate minor changes to the rom firmware . this allows silicon labs to provide future firmware updates to optimize the characteristics of new modem designs and those already deployed in the field. see an70 for further information. 4.15. eeprom interface the isomodem chipset supports an optional serial peripheral interface (spi ) bus serial eeprom. the eeprom must support spi mode 3 with a 16-bit (8 kbit ? 64 kbit range) address. upon powerup, if a pulldown resistor 10 k is placed between d6 (si2403, pin 4) and gnd, the si2403 attempts to detect an eeprom. an installed eeprom may contain custom default settings, firmware upgrades, and/or user-defined at command macros for use in custom at commands or country codes. 4.16. at commands at powerup, the si2403 is in the at command mode. in command mode, the modem monitors the input (serial or parallel) checking constantly for a valid command. (at commands are described in table 8.)
si2403 rev. 1.2 21 table 8. basic at command set (command defaults in bold) command action $ display at command mode settings. a answer incoming call. a/ re-execute last comma nd. this is the only command not preceded by ?at? or followed by a . dn dial the dial command, which may be followed by one or more dial command modifiers, manually dials a phone number: modifier function ! or & flash hook switch for fht (u4f) ms (default: 500 ms) , or < pause before continuing for s8 seconds (default: 2 seconds) ; return to at command mode after verifying dialtone and dial- ing any digits. g telephone voting mode. this modifier, intended for use in japan, enables a special dial -in voting mode that may be used with certain automated voti ng systems. when this modi- fier is placed anywhere in the dial string (e.g. atdg), the si2403 will dial the ph one number and wait s7 seconds (60 by default) to detect a busy tone. when the busy tone is detected, the si2403 will report whether or not a polarity reversal occurs between the time the last digit is dialed and the detection of the busy tone . the si2403 will report either ?polarity reversal? or ?no polarity reversal?. it is not possible to establish a modem connection when using this command. p pulse (rotary) dialing?pulse digits: 0, 1, 2, 3, 4, 5, 6, 7, 8, 9 t tone (dtmf) dialing?dtmf digits: *, #, a, b, c, d, 0, 1, 2, 3, 4, 5, 6, 7, 8, 9. w wait for dial tone before continuing for s14 seconds (default: 12 seconds). blind dialing modes x0, x1, and x3 do not affect the w command. if the dop bit (u7a, bit 7) is set, the ?atdtw? command will cause the si2403 to pause dialing and either report an ?ok? if a dialtone is detected or ?no di altone? if a dial tone is not detected. en local dte echo e0 disable e1 enable hn hook switch. h0 go on-hook (hang up modem). h1 go off-hook. in identification and checksum.
si2403 22 rev. 1.2 i0 display si2403 revision code. b: revision b c: revision c, etc. i1 display si2403 firmware revision code (numeric). i3 display line-side revision code. 15f = si3015 revision f i6 display the si2403 model number. ?2403? = si2403 i7 diagnostic results 1. see ?an70: si2456/si2433/si2414/si2403 modem designer?s guide? for details. i8 diagnostic results 2. see an70 for details. mn speaker operation (via aout). m0 speaker is always off. m1 speaker is on while dialing and handshaking; off in data mode. m2 speaker is always on. m3 speaker is off while dialing; on during handshaking and retraining. on return to data mode from command mode operation. o0 return to data mode. o1 return to data mode and perform a full retrain (at any speed except 300 bps). o2 return to data mode and perform rate renegotiation. qn response mode. q0 enable result codes (see table 12 on page 32) q1 disable result codes (enable quiet mode). r initiate v.23 reversal. sn s-register operation (see table 13 on page 33). s$ list contents of all s registers. sn? display contents of s-register n. sn=x set s-register n to value x (where n and x are decimal values). vn result code type (see table 12 on page 32). v0 numeric result codes. v1 verbal result codes xn call progress monitor (cpm)?this command controls which cpm signals are monitored and reported to the host from the si2403. (see table 12 on page 32.) x0 basic results; disable cpm?blind dial (does not wait for dial tone). connect message does not include speed. x1 extended results; disable cpm?blind dial. connect message includes speed. x2 extended results and detect dial tone only?add di al tone detection to x1 mode. does not blind dial. x3 extended results and detect busy only ?add busy tone detection to x1 mode. x4 extended results, full cpm?full cpm enabled, connect message includes speed. table 8. basic at command set (command defaults in bold) (continued) command action
si2403 rev. 1.2 23 x5 extended results?full cpm enabled including ring back detection. adds ri ngback detection to x4 mode. yn long space disconnect?modem hangs up after 1.5 seconds or more of continuous space while on-line. y0 disable. y1 enable. z hard reset?this command is functionally equival ent to pulsing the reset pin low. (see t at in table 6 on page 8.) :e read from serial eeprom. :i interrupt read?this command causes the si2403 to report the lower 8 bits of the interrupt reg- ister i/o control 0 (u70). the cid, ocd, ppd , and ri bits are also cleared, and the int pin (int bit in parallel mode) is deactivated on this read. :m write to serial eeprom. :p program ram write?this command is used to upload firmware supplied by silicon labs to the si2403. the format for this command is at:paaaa, xxxx,yyyy,.... where aaaa is the first address in hexadecimal, and xxxx,yyyy,.... is data in hexade cimal. only one :p command is allowed per at command line. no other commands can be concatenated in the :p command line. this com- mand is only for use with special files provided by silicon laboratories. do not attempt to use this command for any other purpose. use &t6 to display checksum for patch verification. :r user-access register read?this command allows the user to read from the user-access regis- ters. (see pages 35?53.) the format is ?at:raa?, where aa = user-access address in hexadecimal. the ?at:r? command causes all the u- registers to be displayed. :u user-access register write?this command allows the user to write to the 16-bit user-access registers. (see page 35.) the format is ?at:uaa,xxxx,yyyy,zzzz,...? where aa = user-access address in hexadecimal. xxxx = data in hexadecimal to be written to location aa. yyyy = data in hexadecimal to be written to location (aa + 1). zzzz = data in hexadecimal to be written to location (aa + 2). etc. table 8. basic at command set (command defaults in bold) (continued) command action
si2403 24 rev. 1.2 +gci = x country settings - auto matically configure all regist ers for a particular country. x country 0 japan 9 australia aaustria f belgium 16 brazil 1b bulgaria 20 canada 26 china 27 columbia 2e czech republic 31 denmark 35 ecuador 3c finland 3d france 42 germany 46 greece 50 hong kong 51 hungary 53 india 57 ireland 58 israel 59 italy 61 south korea 69 luxembourg 6c malaysia 73 mexico 7b netherlands 7e new zealand 82 norway 87 paraguay 89 philippines 8a poland 8b portugal 9c singapore 9f south africa a0 spain a5 sweden a6 switzerland b8 russia b4 united kingdom b5 united states fe taiwan note: u-registers are configured to silicon laboratorie s? recommended values. changes may be made by writing individual registers after sending the at+g ci command. several countries use the same configurations as the united kingdom and the un ited states. refer to ?an93: modem designer?s guide? for details. +gci = ? list all possible country code settings. +gci? list current country code sett ing (response is: + gci:) table 8. basic at command set (command defaults in bold) (continued) command action
si2403 rev. 1.2 25 +vcdt = x caller id type. x mode 0 after ring only 1 always on 2uk 3 japan +vcid = x caller id enable. x mode 0off 1 on?formatted 2 on?raw data format table 8. basic at command set (command defaults in bold) (continued) command action
si2403 26 rev. 1.2 4.17. extended at commands the extended at commands are supported by the si2403 and are described in tables 9 through 11. table 9. extended at& command set (command defaults in bold) command action &$ display at& current settings. &d0 esc (pin 22) is not used. &d1 esc (pin 22) escapes to command mode from data mode if also enabled by hes u70, bit 15. &d2 esc (pin 22) assertion during a modem connection causes the modem to go on-hook and return to command mode. &d3 esc (pin 22) assertion causes atz command (reset and return ok result code). &gn line connection rate limit?this command sets an upper limit on the line speed that the si2403 can connect. note that the &hn commands may limit t he line speed as well (&gn not used for &h0 or &h1). not all modulations support rates given by &g. any improper setting will be ignored. &g3 1200 bps max &g4 2400 bps max &hn switched network handshake mode?&hn commands must be on a separate command line from atd, ata, or ato commands. &h6 itu-t v.22bis only (2400 bps or 1200 bps) &h7 itu-t v.22 only (1200 bps) &h8 bell 212 only (1200 bps) &h9 bell 103 only (300 bps) &h10 itu-t v.21 only (300 bps) &h11 v.23 (1200/75 bps) &pn japan pulse dialing &p0 configure si2403 for 10 pulse-per -second pulse dialing. for japan. &p1 configure si2403 for 20 pulse-per -second pulse dialing. for japan. &tn test mode &t0 cancel test mode (escape to command mode to issue at&t0). this command will also report the number of bit errors encountered on the previous &t4 test. &t2 initiate itu-t v.54 (analoop) test. modulation se t by &h at command. te st loop is through the dsp (si2403 device) only. the si2403 echoes data from tx pin (register 0 in parallel mode) back to rx pin (register 0 in parallel mode). &t3 initiate itu-t v.54 (analoop) test. modulation se t by &h at command. te st loop is through the dsp (si2403), daa interface section (si2403), isolat ion interface (si3015), and analog hybrid circuit (si3015). si2403 echoes data from tx pin (register 0 in parallel mode) back to rx pin (register 0 in parallel mode). phone line termination required as in figure 1 . to test only the link operation, the hybrid and afe codec can be removed from the test loop by setting the dl bit (u62, bit 1). &t4 initiate transmit as originating modem with auto matic data generation. modulation, data rate, and symbol rate are set by &h, &g, and s41. data patte rn is set by the s40 register. continues until the ath command is sent after an escape into command mode. data is also demodulated as in analoop, and any bit errors are counted to be displayed after the test using &t0.
si2403 rev. 1.2 27 &t5 initiate transmit as answering modem with automatic data generation. modulation, data rate, and symbol rate are set by &h, &g, and s41. data patte rn is set by the s40 register. continues until the ath command is sent after an escape into command mode. data is also demodulated as in analoop, and any bit errors are counted to be displayed after the test using &t0. &t6 compute checksum for firmware-u pgradeable section of program memory. if no firmware upgrade is installed, &t6 returns 0xde5c. &xn automatic determination of telephone line type. &x0 abort &x1 or &x2 command. &x1 automatic determination of telephone line type. result code: wxyzn w: 0 = line supports dtmf dialing. 1 = line is pulse dial only. x: 0 = line supports 20 pps dialing. 1 = line supports 10 pps dialing only. y: 0 = extension network present (pbx). 1 = outside line (pstn) connected directly. z: 0 = continuous dialtone. 1 = make-break dialtone. n: 0?9 (number required for outside line if y = 0). &x2 same as &x1, but y resu lt (pbx) is not tested. * y2a produce a constant answer tone (itu-t) and return to command mode. the answer tone continues until the ath command is received or the s7 timer expires. table 9. extended at& command set (command defaults in bold) (continued) command action
si2403 28 rev. 1.2 table 10. extended at% command set (command defaults in bold) command action %$ display at% command settings. %b report blacklist. see also s42 register. %on answer mode %o1 si2403 will auto-answer a call in answer mode %o2 si2403 will auto-answer a call in originate mode %vn automatic line status detection. after the %v1 and %v2 commands are issued, the si24 03 will automatically check the telephone connection for whether or not a lin e is present. if a line is pres ent, the si2403 will automatically check if the line is already in use. finally, the si24 03 will check line status both before going off-hook and again before dialing. %v1 uses the fixed method, and %v2 uses the adaptive method. %v0 (default) disables this feature. %v0 disable automatic line-in-use detection. %v1 automatic line status detection - fixed method. description: before going off-hook with the atd, ato, or ata commands, the si2403 compares the line voltage (via lvcs) to registers noln (u83) and lius (u84): loop voltage action 0 lvcs nolnreport ?no line? and remain on-hook. noln lvcs liusreport ?line in use? and remain on-hook. lius lcvs go off-hook and establish a modem connection. once the call has begun, the off-hook intrusion algorithm (described in "off-hook intrusion detec- tion" on page 18) op erates normally. in additio n, the si2403 will report ?n o line? if the telephone line is completely disconne cted. if the hoi bit (u77, bit 11) is set, ?line in use? is reported upon intrusion. %v2 automatic line status detection - adaptive method. description: before going off-hook with the atd, ato, or ata commands, the si2403 compares the line voltage (via lvcs) to the nliu (u85) register: loop voltage action 0 lvcs (0.0625 x nliu)report ?no line? and remain on-hook. (0.0625 x nliu) < lvcs (0.85 x nliu)report ?line in use? and remain on-hook. (0.85 x nliu) < lcvsgo off-hook and establish a modem connection. the nliu register is updated every 1 ms with the minimum non-zero value of lvcs in the last 30 ms. this allows the si2403 to eliminate errors due to 50/60 hz interference and also adapt to rel- atively slow change in the on-hook dc reference value on the telephone line. this algorithm does not allow any non-zero values for nliu below 0x0007. t he host may also initialize nliu prior to issuing the %v2 command. once the call has begun, the off-hook intrusion algorithm (described in "off- hook intrusion detection" on page 18) operates normally . in addition, the si 2403 will report ?no line? if the telephone line is completely disconnect ed. if the hoi (u77, bit 11) bit is set, ?line in use? is reported upon intrusion.
si2403 rev. 1.2 29 table 11. extended at\ command set (command defaults in bold) command action \$ display at\ command settings. \bn character length will be auto matically set in autobaud mode. \b0 6n1?six data bits, no parity, one stop bit, one start bit, eight bits total (\n0 only) 1 \b1 7n1?seven data bits, no parit y, one stop bit, one start bit, nine bits total (\n0 only) 1 \b2 7p1?seven data bits, parity optioned by \p, one stop bit, one start bit, 10 bits total \b3 8n1?eight data bits, no parity, one stop bit, one start bit, 10 bits total \b5 8p1?eight data bits, parity optioned by \p, o ne stop bit, one start bit, 11 bits total (\n0 only) \b6 8x1?eight data bits, one escape bit, one stop bit, one start bit, 11 bits total (enables ninth-bit escape mode) \nn asynchronous protocol \n0 wire mode (no error correction) \n2 mnp reliable mode. the si2403 attempts to conn ect with the mnp protocol. if unsuccessful, the call is dropped. \n3 v.42 auto-reliable?the si2403 attempts to connect with the v.42 protocol. if unsuccessful, the mnp protocol is attempted. if unsuccessful, wire mode is attempted. \n4 v.42 (lapm) reliable mode (or drop call)?same as \n3 except that the si2403 drops the call instead of connecting in mnp or wire mode. \n5 v.42 and mnp reliable mode - the si2403 attemp ts to connect with v.42. if unsuccessful, mnp is attempted. if mnp is unsucc essful, the call is dropped. \pn parity type will be automati cally set in autobaud mode. \p0 even \p1 space 1 \p2 odd \p3 mark 1 \qn modem-to-dte flow control \q0 disable all flow control?note that this may on ly be used if the dte speed and the vf speed are guaranteed to match throughout the call. \q2 use cts only notes: 1. when in autobaud mode, \b0, \b1, and \p1 will not be det ected automatically. the combin ation of \b2 and \p3 will be detected. this is compatible with seven data bits, no parity, two stop bits. seven data bits, no parity, one stop bit may be forced by sending at\t17\b1. 2. the autobaud feature does not detect this rate. 3. default is \t16 if a pulldown is connected to pin 16; otherwise, the default is \t9.
si2403 30 rev. 1.2 \q3 use rts/cts \q4 use xon/xoff flow control for modem-to-dte in terface. does not enable modem-to-modem flow control. \tn dte rate - change dte rate. when changing rates, th e result code ?ok? is sent at the old dte rate. all options except \t16 lock the dte to the given rate, and subsequent commands must be sent at this rate. when \t16 is used (or at reset when pi n 16 is pulled down), automatic bandrate detection is used for subsequent commands. \t0 300 bps \t1 600 bps \t2 1200 bps \t3 2400 bps \t4 4800 bps \t5 7200 bps \t6 9600 bps \t7 12.0 kbps 2 \t8 14.4 kbps \t9 19.2 kbps 3 \t10 38.4 kbps \t11 57.6 kbps \t12 115.2 kbps \t13 230.4 kbps \t14 245.760 kbps 2 \t15 307.200 kbps \t16 autobaud on 3 \t17 autobaud off; lock at current baud rate. table 11. extended at\ command set (command defaults in bold) (continued) command action notes: 1. when in autobaud mode, \b0, \b1, and \p1 will not be det ected automatically. the combin ation of \b2 and \p3 will be detected. this is compatible with seven data bits, no parity, two stop bits. seven data bits, no parity, one stop bit may be forced by sending at\t17\b1. 2. the autobaud feature does not detect this rate. 3. default is \t16 if a pulldown is connected to pin 16; otherwise, the default is \t9.
si2403 rev. 1.2 31 \u serial mode?causes a low pulse (25 ms) on ri and dcd . int to be the inverse of esc. rts to be the inverse of cts . parallel mode?causes a low pulse (25 ms) on int . this command terminates with a reset . \vn connect message type \v0 report connect message and protocol message \v2 report connect message only (exclude protocol message) \v4 report connect and protocol message with both upstream and downstream connect rates. *note: table 11. extended at\ command set (command defaults in bold) (continued) command action notes: 1. when in autobaud mode, \b0, \b1, and \p1 will not be det ected automatically. the combin ation of \b2 and \p3 will be detected. this is compatible with seven data bits, no parity, two stop bits. seven data bits, no parity, one stop bit may be forced by sending at\t17\b1. 2. the autobaud feature does not detect this rate. 3. default is \t16 if a pulldown is connected to pin 16; otherwise, the default is \t9.
si2403 32 rev. 1.2 table 12. result codes 1 numeric 2 meaning verbal response x0 x1 x2 x3 x4 x5 0 command was successful ok x x x x x x 1 link established at 300 bps or higher connect x x x x x x 2 incoming ring detected ring x x x x x x 3 link dropped no carrier x x x x x x 4 command failed error x x x x x x 5 link establish at 1200 connect 1200 x x x x x 6 dial tone not present no dialtone x x x 7 line busy busy x x x 9 ringback detected ringing x 10 link established at 2400 connect 2400 x x x x x 30 caller id mark detected cidm x x x x x x 31 hookswitch flash detected flash x x x x x x 32 uk cid state tone alert signal detected stas xxxxxx 33 overcurrent condition x 3 xxxxxx 40 blacklist is full blacklist full (enabled via s42 register) xxxxxx 41 attempted number is black- listed. blacklisted (enabled via s42 register) xxxxxx 42 no phone line present no line (enabled via %vn commands) xxxxxx 43 telephone line is in use line in use (enabled via %vn commands) xxxxxx 44 a polarity reversal was detected polarity reversal (enabled via g modifier) xxxxxx 45 a polarity reversal was not detected no polarity reversal (enabled via g modifier) xxxxxx 70 no protocol protocol: none set with \v command. 75 link established at 75 connect 75 x x x x x 77 v.42 protocol protocol: v42 set with \v command. 80 mnp2 protocol protocol: alternate, + class 2 set with \v command. 81 mnp3 protocol protocol: alternate, + class 3 set with \v command. 82 mnp4 protocol protocol: alternate, + class 4 set with \v command. 102 dtmf dial attempted on a pulse dial only line unobtainable number x x x x x x notes: 1. the connect messages shown in this table are sent when link negotiation is complete. 2. numeric result codes are of the format: result code . 3. x is the only verbal response code that does not follo w the result code standard. there is no leading .
si2403 rev. 1.2 33 5. s-registers the s command allows reading (sn?) or writing (sn=x) the s-registers. the s-registers store values for functions that, typically, are rarely changed, such as timers or coun ters, and the ascii values of control characters, such as carriage return. table 13 su mmarizes the s-register set. table 13. s-register descriptions definition s-register (decimal) function default (decimal) range units 0 automatic answer?number of rings the si2403 must detect before answering a call. 0 disables auto answer. 0 0?255 rings 1 ring counter. 0 0?255 rings 2 esc code character. 43 (+) 0?255 ascii 3 carriage return character. 13 (cr) 0?255 ascii 4 linefeed character. 10 (lf) 0?255 ascii 5 backspace character. 08 (bs) 0?255 ascii 6 dial tone wait timer?number of seconds the si2403 waits before blind dialing. on ly applicable if blind dial- ing is enabled (x0, x1, x3). 02 0?255 seconds 7 carrier wait timer?number of seconds the si2403 waits for carrier before timing out. this register also sets the number of seconds the modem waits for ring- back when originating a call before hanging up. this register also sets the number of seconds the answer tone will continue while using the at * y2a command. 80 0?255 seconds 8 dial pause timer for , and < dial command modifiers. 02 0?255 seconds 9 carrier presence timer?time after a loss of carrier that a carrier must be detected before reactivating dcd . s9 is referred to as ?c arrier loss debounce time.? 06 1?255 0.1 seconds 10 carrier loss timer?time the carrier must be lost before the si2403 disconnects. setting 255 disables disconnect entirely. if s10 is less than s9, even a momentary loss of carrier causes a disconnect. 14 1?255 0.1 seconds 12 escape code guard timer?minimum guard time required before and after ?+++? for the si2403 to rec- ognize a valid escape sequence. 50 1?255 0.02 seconds 14 wait for dial tone delay value (in relation to the w dial modifier). starts when ?w? is executed in the dial string. 12 0?255 seconds 24 sleep inactivity time?sets the time that the modem operates in normal power mo de with no activity on the serial port, parallel port, or telephone line before enter- ing low-power sleep mode. this feature is disabled if the timer is set to 0. 0 0?255 seconds
si2403 34 rev. 1.2 30 disconnect activity timer?sets the length of time that the modem stays online before disconnecting with no activity on the serial port, parallel port, or telephone line (ring, hookswitch flash, or caller id). this feature is disabled if set to 0. 0 0?255 minutes 38 hang up delay time?maximum delay between receipt of ath0 command and hang up. if time out occurs before all data can be sent, the no carrier (3) result code is sent (operates in v.42 mode only). ?ok? response is sent if a ll data is transmitted before timeout. s38 = 255 disables timeout and modem dis- connects only if data is su ccessfully sent or carrier is lost. 20 0?255 seconds 40 data pattern - data pattern generated during &t4 and &t5 transmit tests. 0 ? all spaces (0s) 1 ? all marks (1s) 2 ? random data 0 0?2 ? 42 blacklisting - the si2403 will not dial th e same number more than three times in three minutes. an attempt to dial a fourth time within th ree minutes will result in a ?blacklisted? result code. if the blacklist memory is full, any dial to a new numb er will result in a ?black- list full? result code. numbers are added to the blacklist only if the modem connection fails. the %b command will list the numbers on the blacklists. 0: disabled 1: enabled 0 (disabled) 0?1 ? 43 dial attempts to blacklist. when blacklisting is enabled with s42, this value con- trols the number of dial at tempts that will result in a number being blacklisted. 4 0?4 ? 44 blacklist timer. period during which blacklisting is active 180 0?255 seconds 50 minimum on-hook time?m odem will remain on-hook for s50 seconds. any attemp t to go off-hook will be delayed until this timer expires. 3 0?255 seconds 51 number to start checking for an outside line on a pbx. 1 0?9 ? table 13. s-register descriptions (continued) definition s-register (decimal) function default (decimal) range units
si2403 rev. 1.2 35 6. user-access registers (u-registers) the :u at command is used to write these 16-bit u- registers, and the :r command is used to read them. u- registers are identified by a hexidecimal (hex) address. table 14. u-register descriptions register name description default u00 dt1a0 dt1 registers set the coefficients for stage 1 of the dial tone detect filter. default is for fcc countries. see ?an70: si2456/si2433/si2414/si2403 modem designer?s guide? for other country settings. 0x0800 u01 dt1b1 0x0000 u02 dt1b2 0x0000 u03 dt1a2 0x0000 u04 dt1a1 0x0000 u05 dt2a0 dial tone detect filters stage 2 biquad coefficients. 0x00a0 u06 dt2b1 0x6ef1 u07 dt2b2 0xc4f4 u08 dt2a2 0xc000 u09 dt2a1 0x0000 u0a dt3a0 dial tone detect filters stage 3 biquad coefficients. 0x00a0 u0b dt3b1 0x78b0 u0c dt3b2 0xc305 u0d dt3a2 0x4000 u0e dt3a1 0xb50a u0f dt4a0 dial tone detect filters stage 4 biquad coefficients. 0x0400 u10 dt4b1 0x70d2 u11 dt4b2 0xc830 u12 dt4a2 0x4000 u13 dt4a1 0x80e2 u14 dtk dial tone detect filter output scaler. 0x0009 u15 dton dial tone detect on threshold. 0x00a0 u16 dtof dial tone detect off threshold. 0x0070
si2403 36 rev. 1.2 u17 bt1a0 bt1 registers set the coefficients for stage 1 of the busy tone detect filter. default is for fcc countries. see an70 for other country settings. 0x0800 u18 bt1b1 0x0000 u19 bt1b2 0x0000 u1a bt1a2 0x0000 u1b bt1a1 0x0000 u1c bt2a0 busy tone detect filter stage 2 biquad coefficients. 0x00a0 u1d bt2b1 0x6ef1 u1e bt2b2 0xc4f4 u1f bt2a2 0xc000 u20 bt2a1 0x0000 u21 bt3a0 busy tone detect filter stage 3 biquad coefficients. 0x00a0 u22 bt3b1 0x78b0 u23 bt3b2 0xc305 u24 bt3a2 0x4000 u25 bt3a1 0xb50a u26 bt4a0 busy tone detect filter stage 4 biquad coefficients. 0x0400 u27 bt4b1 0x70d2 u28 bt4b2 0xc830 u29 bt4a2 0x4000 u2a bt4a1 0x80e2 u2b btk busy tone detect filter output scaler. 0x0009 u2c bton busy tone detect on threshold. 0x00a0 u2d btof busy tone detect off threshold. 0x0070 u2e bmtt busy cadence minimum total time in seconds multiplie d by 7200. 0x0870 u2f bdlt busy cadence delta in seconds multiplied by 7200. 0x25f8 u30 bmot busy cadence minimum on time in seconds multiplied by 7200. 0x0438 u31 rmtt ringback cadence minimum total time in seconds multip lied by 7200. 0x4650 u32 rdlt ringback cadence delta in seconds multiplied by 7200. 0xef10 u33 rmot ringback cadence minimum on time in seconds multiplied by 7200. 0x1200 u34 dtwd window to look for dialtone in seconds multiplied by 1000. 0x1b58 table 14. u-register descriptions (continued) register name description default
si2403 rev. 1.2 37 u35 dmot minimum dialtone on time in seconds multiplied by 7200. 0x2d00 u37 pd0 number of pulses to dial 0. 0x000a u38 pd1 number of pulses to dial 1. 0x0001 u39 pd2 number of pulses to dial 2. 0x0002 u3a pd3 number of pulses to dial 3. 0x0003 u3b pd4 number of pulses to dial 4. 0x0004 u3c pd5 number of pulses to dial 5. 0x0005 u3d pd6 number of pulses to dial 6. 0x0006 u3e pd7 number of pulses to dial 7. 0x0007 u3f pd8 number of pulses to dial 8. 0x0008 u40 pd9 number of pulses to dial 9. 0x0009 u42 pdbt pulse dial break time (ms units). 0x003d u43 pdmt pulse dial make time (ms units). 0x0027 u45 pdit pulse dial interdig it time (ms units). 0x0320 u46 dtpl dtmf power level? 16-bit format is 0x0( h)(l)0 where h is the (?)dbm level of the high-frequency dtmf tone, and l is the (?)dbm level of the low-frequency dtmf tone. note that twist may be specified here. 0x09b0 u47 dtnt dtmf on time (ms units). 0x0064 u48 dtft dtmf off time (ms units). 0x0064 u49 rgfh ring frequency high?maximum frequency ring to be considered a valid ring. rgfh = 2400/(maximum ring frequency). 0x0022 u4a rgfd ring delta 0x007a u4b rgmn ring cadence minimum on time in seconds multiplied by 2400. 0x0258 u4c rgnx ring cadence maximum total time in seconds multiplied by 2400. 0x6720 u4d mod1 this is a bit-mapped register. 0x0000 u4e prdd pre-dial delay-time after atd command that modem waits to dial (ms units). the si2403 stays on-hook during this time. 0x0000 u4f fht flash hook time. time corresponding with ?!? or ?&? dial modifier that the si2403 goes on-hook during a flash hook (ms units). 0x01f4 u50 lcdn loop current debounce on time (ms units). 0x015e table 14. u-register descriptions (continued) register name description default rgfd 2400hz 1 min ring freq (hz) ---------------------------------------------- - ?? ?? 1 max ring freq (hz) ----------------------------------------------- - ?? ?? ? =
si2403 38 rev. 1.2 u51 lcdf loop current debounce off time (ms units). 0x00c8 u52 xmtl transmit level (1 db units)?sets the modem data pump transmitter level. default level of 0 corresponds to ?9.85 dbm. transmit level = ?(9.85 + xmtl) dbm. range = ?9.85 to ?48. 0x0000 u53 mod2 this is a bit-mapped register. 0x0000 u62 daac1 this is a bit-mapped register. 0x0804 u65 daac4 this is a bit-mapped register. 0x00e0 u66 daac5 this is a bit-mapped register. 0x0049 u67 itc1 this is a bit-mapped register. 0x0008 u68 itc2 this is a bit-mapped register. 0x0000 u69 itc3 this is a bit-mapped register. 0x0006 u6a itc4 this is a bit-mapped register. n/a u6e ck1 this is a bit-mapped register. 0x1f20 u6f ptmr this is a bit-mapped register. 0x00ff u70 io0 this is a bit-mapped register. 0x2700 u76 gen1 this is a bit-mapped register. 0x3240 u77 gen2 this is a bit-mapped register. 0x401e u78 gen3 this is a bit-mapped register. 0x0000 u79 gen4 this is a bit-mapped register. u7a gena this is a bit-mapped register. 0x0000 u7c genc this is a bit-mapped register. 0x0000 u7d gend this is a bit-mapped register. 0x0000 u83 noln no-line threshold. if %v1 is set, no ln sets the threshold for determination of line present vs. line not present. 0x0001 u84 lius line-in-use threshold. if %v1 is set, lius sets th e threshold for determination of line in use vs. line not in use. 0x0007 u85 nliu line-in-use/no line threshold. if %v2 is set, nliu sets the threshold reference for the adaptive algorithm (see %v2). 0x0000 table 14. u-register descriptions (continued) register name description default
si2403 rev. 1.2 39 table 15. bit-mapped u-register summary reg. name bit 15 bit 14 bit 13 bit 12 bit 11 bit 10 bit 9 bit 8 bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 u4d mod1 toct nhfp nhfd clpd ftp spdm gt18 gt55 cte llc lcn u53 mod2 rev u62 daac1 foh dl u65 daac4 pwm pwmg pdn pdl u66 daac5 fdt u67 itc1 off ohs act dct[1:0] rz rt u68 itc2 lim bte rov btd u69 itc3 dial fjm vol flvm mode u6a itc4 ovl u6e ck1 r1[4:0] u6f ptme ptmr[7:0] u70 io0 hes tes cidm ocdm ppdm rim dcdm cid ocd ppd ri dcd u76 gen1 ohsr[6:0] facl dcl[2:0] acl[4:0] u77 gen2 ist[3:0] hoi aoc oht[8:0] u78 gen3 ib[1:0] is[7:0] u79 gen4 lvcs[4:0] u7a gena dop add hdlc fast u7c genc rigpo rig- poen u7d gend lvff llv ausdc atzd fdp
si2403 40 rev. 1.2 6.1. bit-mapped u-register detail (defaults in bold) reset settings = 0x0000 u4d mod1 bit d15 d14 d13 d12 d11 d10 d9 d8 d7 d6 d5 d4 d3 d2 d1 d0 name toct nhfp nhfd clpd ftp spdm gt18 gt55 cte llc lcn type r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w bit name function 15 reserved read returns zero. 14 toct turn off calling tone. 0 = disable. 1 = enable. 13 reserved read returns zero. 12 nhfp no hook flash pulse. 0 = disable. 1 = enable. 11 nhfd no hook flash dial. 0 = disable. 1 = enable. 10 clpd check loop current before dialing. 0 = ignore. 1 = check. 9 reserved read returns zero. 8 ftp force tone or pulse. 0 = disable. 1 = enable. 7 spdm skip pulse dial modifier. 0=no. 1 = yes. 6 reserved read returns zero. 5gt18 1800 hz guard tone enable. 0 = disable. 1 = enable. 4gt55 550 hz guard tone enable. 0 = disable. 1 = enable. 3cte calling tone enable. 0 = disable. 1 = enable. 2 reserved read returns zero.
si2403 rev. 1.2 41 reset settings = 0x0000 reset settings = 0x0804 1llc low loop current detect (required for ctr21). 0 = disabled. 1 = enabled. 0 lcn loop current needed. 0=no. 1 = yes. u53 mod2 bit d15 d14 d13 d12 d11 d10 d9 d8 d7 d6 d5 d4 d3 d2 d1 d0 name rev type r/w bit name function 15 rev v.23 reversing. 0 = disable. 1 = enable. 14:0 reserved read returns zero. u62 daac1 bit d15 d14 d13 d12 d11 d10 d9 d8 d7 d6 d5 d4 d3 d2 d1 d0 name foh dl type r/w r/w bit name function 15:12 reserved must be set to 0. 11 reserved must be set to 1. 10:3 reserved must be set to 0. 2foh fast off-hook. 0 = automatic calibration time set to 426 ms 1 = automatic calibration time set to 106 ms 1dl isolation digital loopback (see the at&t commands). 0 = loopback occurs beyond the isolation interface, out to and including the analog hybrid circuit. 1 = enables digital loopback mode across isolation barrier only. 0 reserved must be set to 0. bit name function
si2403 42 rev. 1.2 reset settings = 0x00e0 u65 daac4 bit d15 d14 d13 d12 d11 d10 d9 d8 d7 d6 d5 d4 d3 d2 d1 d0 name pwm pwmg pdn pdl type r/w r/w r/w r/w bit name function 15 pwm pwm mode. 0 = normal. classic pwm output waveform. 1 = scrambled mode. low-distortion mode if used with output circuit shown in ?an70: si2456/ si2433/si2414/si2403 modem designer?s guide?. 14 pwmg pwm gain. 0=no gain. 1 = 6 db gain applied to aout. 13 pdn powerdown. completely powerdown the si2403 and si3015. once set to 1, the si2403 must be reset to power on. 0 = normal. 1 = powerdown. 12:8 reserved read returns zero. 7:5 reserved must not change in a read-modify-write. 4pdl* powerdown line-side chip. 0 = normal operation. 1 = places the si3015 in powerdown mode. 3:0 reserved must not change in a read-modify-write. *note: typically used only for board-level debug.
si2403 rev. 1.2 43 reset settings = 0x0049 u66 daac5 bit d15 d14 d13 d12 d11 d10 d9 d8 d7 d6 d5 d4 d3 d2 d1 d0 name fdt type r bit name function 15:7 reserved read returns zero. 6fdt* frame detect. 0 = indicates isolation link has not established frame lock. 1 = indicates isolation link frame lock has been established. 5:4 reserved read returns zero. 3:0 reserved do not modify. *note: typically used only for board-level debug.
si2403 44 rev. 1.2 reset settings = 0x0008 u67 itc1 bit d15 d14 d13 d12 d11 d10 d9 d8 d7 d6 d5 d4 d3 d2 d1 d0 name off ohs act dct[1:0] rz rt type r/w r/w r/w r/w r/w r/w bit name function 15:8 reserved read returns zero. 7off dc termination off. 0 = normal operation. the off bit must always be set to 0 when on-hook. 1 = dc termination disabled and the device presents an 800 dc impedance to the line, which is used to enhance operation with an off-hook parallel phone. 6ohs on-hook speed. 0 = the si2403 will execute a fast on-hook. 1 = the si2403 will execute a slow controlled on-hook. 5act ac termination select. 0 = selects the real impedance. 1 = selects the complex impedance. 4 reserved read returns zero. 3:2 dct[1:0] dc termination select. 00 = low-voltage mode (transmit level = ?13.85 dbm). 01 = japan mode (transmit level = ?11.85 dbm). 10 = fcc mode. standard voltage m ode (transmit level = ?9.85 dbm). 11 = ctr21 mode. current limiting mode (transmit level = ?9.85 dbm). 1rz ringer impedance. 0 = maximum (high) ringer impedance. 1 = synthesize ringer impedance. c15, r14, z2, and z3 must not be installed when setting this bit. see the ?ringer impedance? section in ?an70: si2456/si2433/si2414/si2403 modem designer?s guide?. 0rt ringer threshold select. used to satisfy country requirements on ring de tection. signals below the lower level do not generate a ring detection; signals above t he upper level are guaranteed to generate a ring detection. 0 = 11 to 22 v rms . 1 = 17 to 33 v rms .
si2403 rev. 1.2 45 reset settings = 0x0000 u68 itc2 bit d15 d14 d13 d12 d11 d10 d9 d8 d7 d6 d5 d4 d3 d2 d1 d0 name lim bte rov btd type r/w r/w r/w r/w bit name function 15:8 reserved read returns zero. 7:5 reserved do not modify. 4lim current limit. 0 = all other modes. 1 = ctr21 mode. 3 reserved do not modify. 2bte billing tone protect enable. 0 = disabled. 1 = enabled. when set, the daa responds automatically to a collapse of the line-derived power supply dur- ing a billing tone event. when of f-hook, if bte = 1 and btd goes high, the dc termination is released (800 presented to line). if bte and rim (u70, bit 9) are set, an ri (u70, bit 1) interrupt also occurs when btd goes high. 1rov receive overload. the bit is set when the receive input (i.e., receive pin goes below ground) has an excessive input level. this bit is cleared by writing a 0 to this location. 0 = normal receive input level. 1 = excessive receive input level. 0btd billing tone detected. this bit is set if a billing tone is detected. this bit is cleared by writing a 0 to this location. 0 = no billing tone. 1 = billing tone detected.
si2403 46 rev. 1.2 reset settings = 0x0006 u69 itc3 bit d15 d14 d13 d12 d11 d10 d9 d8 d7 d6 d5 d4 d3 d2 d1 d0 name dial fjm vol flvm mode type r/w r/w r/w r/w r/w bit name function 15:8 reserved read returns zero. 7 reserved do not modify. must be set to zero. 6dial dtmf dialing mode. this bit should be set during dtmf dialing in ctr21 mode if lvcs < 12. 0 = normal operation. 1 = increase headroom for dtmf dialing. 5fjm force japan dc termination mode. 0 = normal gain. 1 = when dct = 2 (fcc mode), setting this bit forces japan dc termination mode while allow- ing for a transmit level of ?1 dbm. see the ?d tmf dialing? section in ?an70: si2456/si2433/ si2414/si2403 modem designer?s guide?. 4vol line voltage adjust. when set, this bit adjusts the tip-ring line voltage. lowering th is voltage improves margin in low-voltage countries. raising this voltage may improve large-signal distortion performance. 0 = normal operation. 1 = lower dct voltage. 3flvm force low voltage mode. when dct (u67, bits 3:2) = 10 (fcc mode), setting flvm forces the low-voltage mode (see dct = 00) while allowing for a tr ansmit level of ?1 dbm. 0 = disable. 1 = enable. 2mode mode. this bit enables on-hook line monitoring. it is automatically set while on-hook and cleared while off-hook. 1:0 reserved do not modify.
si2403 rev. 1.2 47 reset settings = n/a reset settings = 0x1f20 u6a itc4 bit d15 d14 d13 d12 d11 d10 d9 d8 d7 d6 d5 d4 d3 d2 d1 d0 name ovl type r bit name function 15:3 reserved read returns zero. 2ovl overload detected. this bit has the same function as rov but clears itself after the overload has been removed. see the ?billing tone detection? section in ?an70: si2456/si2433 /si2414/si2403 modem designer?s guide?. this bit is not affected by the bte bit. 1:0 reserved do not modify. u6e ck1 bit d15 d14 d13 d12 d11 d10 d9 d8 d7 d6 d5 d4 d3 d2 d1 d0 name r1[4:0] type r/w r/w bit name function 15:13 reserved do not modify. 12:8 r1*[4:0] r1 clkout divider 0 clkout off. r1 r1 + 1 (default r1 = 31; 2.4576 mhz). r1 = 31 required for proper codec interface operation. 7:0 reserved do not modify. note: see figure 5 on page 17.
si2403 48 rev. 1.2 reset settings = 0x00ff u6f ptmr bit d15 d14 d13 d12 d11 d10 d9 d8 d7 d6 d5 d4 d3 d2 d1 d0 name ptmr[7:0] type r/w bit name function 15:8 reserved do not modify 7:0 ptmr[7:0] parallel port receive fifo interrupt timer (msec units). see ?an70: si2456/si2433/si2414/ si2403 modem designer?s guide? for more details.
si2403 rev. 1.2 49 reset settings = 0x2700 u70 io0 bit d15 d14 d13 d12 d11 d10 d9 d8 d7 d6 d5 d4 d3 d2 d1 d0 name hes tes cidm ocdm ppdm rim dcdm cid ocd ppd ri dcd type r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w bit name function 15 hes hardware escape pin. 0 = disable. 1 = enable. 14 reserved read returns zero. 13 tes enable ?+++? escape. 0 = disable. 1=enable. 12 cidm caller id mask. 0 = change in cid will not affect int. 1 = a low-to-high transition in cid activates int . 11 ocdm overcurrent detect mask. 0 = change in ocd does not affect int. (?x? result code is not generated in command mode.) 1 = a low-to-high transition in ocd will activate int. (?x? result code is genera ted in command mode.) 10 ppdm parallel phone detect mask. 0 = change in ppd does not affect int . 1 = a low-to-high transition in ppd will activate int. 9rim ring indicator. 0 = change in ri does not affect int . 1 = a low-to-high transiti on in ri activates int. 8dcdm data carrier detect mask. 0 = change in dcd does not affect int . 1 = a high-to-low transition in dcd (u70, bit 0), which indicates loss of carrier, activates int. 7 reserved must be set to zero. 6:5 reserved read returns zero. 4cid caller id (sticky). caller id preamble has been detected; data will soon fo llow. clears on :i read. 3ocd overcurrent detect (sticky). overcurrent condition has occurred. clears on :i read. 2 ppd parallel phone detect (sticky). parallel phone detected since last off-hook event. clears on :i read. 1ri ring indicator. active high bit when the si2403 is on-hook indicates ring event has occurred. clears on :i read. 0dcd data carrier detect (status). active high bit indicates carrier detected (equivalent to inverse of dcd pin).
si2403 50 rev. 1.2 reset settings = 0x3240 u76 gen1 bit d15 d14 d13 d12 d11 d10 d9 d8 d7 d6 d5 d4 d3 d2 d1 d0 name ohsr[6:0] facl dcl[2:0] acl[4:0] type r/w r/w r/w r/w bit name function 15:9 ohsr[6:0] off-hook sample rate (40 ms units) sets the sample rate for the off-hook intrusion algorithms (1 second default). 8facl force acl. 0 = while off-hook, acl is automatically updated with lvcs. 1 = while off-hook, acl does not change from the value written to it while on-hook. 7:5 dcl[2:0] differential current level (3 ma units). sets the differential level betw een acl and lvcs that will trig ger an off-hook ppd interrupt (default = 2). 4:0 acl[4:0] absolute current level (3 ma units, see figure 7 on page 19). acl represents the value of lvcs current when the si2403 is off-hook and all parallel phones are on-hook. if acl = 0, it is ignored by the off-hook intrusion algorithm.the si2403 will also write acl with the contents of lvcs before an intrusion and before going on-hook (default = 0).
si2403 rev. 1.2 51 reset settings = 0x401e u77 gen2 bit d15 d14 d13 d12 d11 d10 d9 d8 d7 d6 d5 d4 d3 d2 d1 d0 name ist[3:0] hoi aoc oht[8:0] type r/w r/w r/w r/w bit name function 15:12 ist[3:0] intrusion settling time (250 ms units). delay between the time the si2403 goes off-hook and the time the off-hook intrusion algo- rithm begins. default is 1 s. 11 hoi hang-up on intrusion. 0 = si2403 will not automatically hang up when an off-hook ppd interrupt occurs. 1 = si2403 automatically hangs up on a ppd interrupt. if %vn commands are set, hoi also causes the ?line in use? re sult code upon ppd interrupt. 10 reserved read returns zero. 9aoc overcurrent detection. enable overcurrent detection. 0 = disable. 1 = enable. note: aoc may falsely detect an overcurrent condition in the presence of line reversals or other transients. therefore, this feature should not be used in applications or locations, such as japan, where line reversals are common or may be expected. 8:0 oht[8:0] off-hook time (1 ms units). time before lvcs is checked for overcurrent condition after going off-hook (30 ms default).
si2403 52 rev. 1.2 reset settings = 0x0000 u78 gen3 bit d15 d14 d13 d12 d11 d10 d9 d8 d7 d6 d5 d4 d3 d2 d1 d0 name ib[1:0] is[7:0] type r/w r/w bit name function 15:14 ib[1:0] intrusion blocking. defines the method used to block the off-hook intrusion algorithm from operation after dialing has begun. 0 = no intrusion blocking. 1 = intrusion disabled from start of dial to end of dial. 2 = intrusion disabled from start of dial to is register time-out. 3 = intrusion disabled from start of dial to connect (?connect xxx?, ?no dialtone?, or ?no carrier?). 13:8 reserved read returns zero. 7:0 is[7:0] intrusion suspend (500 ms units). when ib = 2, this register sets the length of time, starting when dialing begins, that the off- hook intrusion algorithm is blocked (suspended) (default = 00000000 b ).
si2403 rev. 1.2 53 u79 gen4 bit d15 d14 d13 d12 d11 d10 d9 d8 d7 d6 d5 d4 d3 d2 d1 d0 name lvcs[4:0] type r bit name function 15:5 reserved read returns zero. 4:0 lvcs[4:0] line voltage current sense. represents either the line voltage, loop current, or on-hook line monitor depending on the state of the mode, ofhk, and onhm bits. on-hook voltage monitor (2.75 v/bit 20%) (see figure 6 on page 19). 00000 = no line connected. 00001 = minimum line voltage (v min = 3.0 v 0.5 v). 11111 = maximum line voltage (87 v 20%). the line voltage monitor full scale may be modified by changing r5 as follows: v max = v min + 4.2 (10m + r5 + 1.6k)/(r5 +1.6k)/5 u69[2] (mode) must be set to 1 b before reading lvcs while the si2403 is on-hook. see mode on page 46. u69[2] (mode) must be disabled (mode = 0 b ) before the si2403 can go off-hook, dial, or answer a call. off-hook loop current monitor (3 ma/bit) (see figure 7 on page 19). 00000 = no loop current. 00001 = minimum loop current. 11110 = maximum loop current. 11111 = loop current is excessive (overload). overload > 140 ma in all modes except ctr21 overload > 54 ma in ctr21 mode
si2403 54 rev. 1.2 reset settings = 0x0000 u7a gena bit d15 d14 d13 d12 d11 d10 d9 d8 d7 d6 d5 d4 d3 d2 d1 d0 name dop add hdlc fast type r/w r/w r/w r/w bit name function 15:8 reserved read returns to zero. 7dop dial or pulse. 0 = normal atdtw operation 1 = use atdtw for pulse/tone dial dete ction (see also atdw command) 6add adaptive dialing. 1 = enable 0=disable attempt dtmf dial, then fall back to pulse dialin g if unsuccessful. first digit is dialed as dtmf. if a dialtone is still present after two se conds, the si2403 will redi al the first digit and remaining digits as pulse. if a dialtone is not present after two seconds, the si2403 will dial the remaining digits as dtmf. 5:2 reserved read returns to zero. 1hdlc synchronous mode.* 0 = normal asynchronous mode. 1 = transparent hdlc mode. 0 fast fast connect.* 0 = normal modem handshake timing per itu/bellco re standards. 1 = fast connect modem handshake timing. *note: when v22hd, hdlc, or fast bits are set, \n0 (wire mode) must be used.
si2403 rev. 1.2 55 reset settings = 0x0000 u7c genc bit d15 d14 d13 d12 d11 d10 d9 d8 d7 d6 d5 d4 d3 d2 d1 d0 name rigpo rigpoen type rr/w bit name function 15:5 reserved reads returns to zero. 4rigpo ri. ri (pin 15), follows this bit when rigpioen = 1 b . 3:1 reserved reads returns to zero. 0 rigpoen 0 = ri indicates valid ring sign al (normal ring-indicator mode). 1 = ri (pin 15) can be used as a general-pu rpose output and follo ws u7c[4] (rigpo).
si2403 56 rev. 1.2 reset settings = 0x0000 u7d gend bit d15d14d13d12d11d10 d9 d8d7d6d5d4d3d2 d1 d0 name lvfe llv ausdc atzd fdp type r/w r/w r/w r/w r/w bit name function 15:14 reserved reads returns to zero. 13 lvfe lvcs filter enable. 0 = normal operation 1 = enables optional filtering on lvcs to mitigate the effect of 50/60 hz noise on tip/ring volt- age. 12:11 reserved read returns zero. 10 llv 0 = normal operation. 1 = enables an optional algorithm for countries, such as japan and malaysia, with low loop voltage. also set u67[3:2] (dct) = 00 b , u69[4] vol = 1 b , and u52 = 0x0002 before going off- hook. when the modem goes off-hook, it samp les lvcs and changes dct and vol as nec- essary to maximize transmit le vels and optimize distortion. 9ausdc 0 = normal operation. 1 = causes the modem to go off-hook in japan mode and then revert to fcc mode after 500 ms. this allows the modem to meet the australian line seizure requirements while allow- ing the maximum transmit power (optional for australia and when dct = 01 b ). 8:2 reserved reads returns to zero. 1 atzd atz disable. 0 = atz functions normally. 1 = disable atz command. this may be used to ensure modem settings are not lost in some systems. 0fdp fsk data processing. 0 = fsk data processing stops when carrier is lost. 1 = fsk data processing continued for 2 bytes after carrier is lost.
si2403 rev. 1.2 57 7. parallel interface registers reset settings = 0x00 parallel interface 0 (0x00) bit d7 d6 d5 d4 d3 d2 d1 d0 name tx/rx type r/w bit name function 7:0 tx/rx parallel interface transmit/receive. this register functions similarly to the serial po rt tx pin on writes to the parallel port, and sim- ilarly to the serial port rx pin on reads from the parallel port.
si2403 58 rev. 1.2 reset settings = 0110_0011 parallel interface 1 (0x01) bit d7 d6 d5 d4 d3 d2 d1 d0 name rxf txe rem intm int esc rts cts type r r r r/w r r/w r/w r bit name function 7rxf receive fifo almost full (status). 0 = receive fifo (12 deep) contains th ree or more empty locations (rxf 9). the host can clear the rxf interrupt without em ptying the rx fifo by writing a 0 to the rxf bit. this will disable the rxf interrupt until the host has emptied the fifo. 1 = receive fifo contains two or fewer empty locations (rxf 10). 6txe transmit fifo almost empty (status). 0 = transmit fifo (14 deep) contains three or more characters (txf 3). 1 = transmit fifo contains two or fewer characters (txf 2). txe interrupt will not trigger if the cts bit is inactive. therefore, the host do es not need to poll cts while waiting for trans- mit fifo to empty. txe can be cleared by writing it to 0. 5rem receive fifo empty. 0 = receive fifo has valid data. 1 = receive fifo empty. note: if the interim timer (see ptmr - u6f, bits 7:0) se t by ptmr expires, it will cause an interrupt. this interrupt will not set rxf, txe, or int. the inte rrupt handler on the host should then verify that rem = 0 and begin to empty the receive fifo (parallel interface 0 register) until rem = 1. 4intm interrupt mask. 0 = in parallel mode, the int pin is triggered by a rising edge on rxf or txe only (default). 1 = in parallel mode, the int pin is triggered by a rising edge on rxf, txe, or int. 3int interrupt. 0 = no interrupt has occurred. 1 = indicates that an interrupt (cid, ocd, ppd, ri , or dcd from u70) has occurred. this bit is cleared via the at:i command. 2 esc escape. operation of this bit in parallel mode is functionally-equivalent to the esc pin in serial mode. 1rts request-to-send. operation of this bit in parallel mode is functionally equivalent to the rts pin in serial mode. use of the cts and rts bits (as opposed to the txe and rxf bits) allows the flow control between the host and the si2403 to operate 1 byte at a time rather than in blocks. 0cts clear-to-send. operation of this bit in parallel mode is functionally-equivalent to the cts pin in serial mode. use of the cts and rts bits (as opposed to the txe and rxf bits) allows the flow control between the host and the si2403 to operate 1 byte at a time, rather than in blocks.
si2403 rev. 1.2 59 8. pin descriptions: si2403 pin # pin name description 1 clkin/xtali clock input/crystal oscillator pin. this pin provides support for parallel-resonant, at-cut crystals. xtali also acts as an input in the event that an external clock source is used in place of a crystal. a 4.9152 mhz crystal or 4.9152 mhz clock is required. 2x t a l o crystal oscillator pin. this pin provides support for parallel-resonant at-cut crystals. xtalo serves as the output of the crystal amplifier. 3 clkout/eecs /a0 clock output/eeprom chip select/addr ess bit 0. clock output in serial mo de. active low read/write enable for spi eeprom in serial mode when pin 4 is pulled low during powerup. address enable in parallel mode. 4d6 data bit. bidirectional parallel bus da ta bit 6 in parallel mode. 5, 19 vd3.3 digital supply voltage. provides the 3.3 v digital supply voltage to the si2403. 6, 18 gnd ground. connects to the system digital ground. 7,17 vda, vdb digital rail. pin provides decoupling for the internal power supplies. 8rts /d7 request-to-send/data bit. request-to-send (for flow control) in serial mode. bidirectional parallel bus data bit 7 in parallel mode. 9rxd/rd receive data/read enable. data output to dte rxd pin in serial mo de. active low read enable pin in parallel mode. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 clkin/xtali xtalo clkout/eecs/a0 d6 vd3.3 gnd vda rts/d7 rxd/rd txd/wr cts/cs reset aout/int int/d0 ri/d1 eesd/d2 vdb gnd vd3.3 c1a esc/d3 dcd/d4 isob eeclk/d5
si2403 60 rev. 1.2 10 txd/wr transmit data/write enable. data input from dte txd pin in serial mode. active low write-enable pin in paral- lel mode. 11 cts /cs clear-to-send/chip select. active low clear-to-send (for flow control) in serial mode. active low chip select in parallel mode. 12 reset reset input. an active low input that is used to reset all control regi sters to a defined initialized state. 13 aout/int analog output/interrupt output. analog output in serial mode. active low interrupt output in parallel mode. 14 int /d0 interrupt output/data bit. active low interrupt output in serial mode. bidirectional parallel bus data bit 0 in parallel mode. 15 ri /d1 ring indicator/data bit. the ri on (active low) indicates the presence of an on segment of a ring signal on the telephone line. bidirectional parallel bus data bit 1 in parallel mode. 16 eesd/d2 eeprom serial data input/output/data bit. bidirectional input/o utput to spi eeprom in serial mode. bidirectional parallel bus data bit 2 in parallel mode. 20 isob bias voltage. this pin provides decoupling for the power supply. 21 c1a isolation capacitor 1a. connects to one side of the isolation capacitor, c1. 22 esc/d3 escape/data bit. hardware escape in serial mode. bidirect ional parallel bus data bit 3 in parallel mode. 23 dcd /d4 carrier detect/data bit. active low-carrier detect in serial mode. bidirectional parallel bus data bit 4 in par- allel mode. 24 eeclk/d5 eeprom clock/data bit. clock output for spi eeprom in serial mode . bidirectional parallel bus data bit 5 in parallel mode. pin # pin name description
si2403 rev. 1.2 61 9. pin descriptions: si3015 pin # pin name description 1qe2 transistor emitter 2. connects to the emitter of q4. 2 dct dc termination. provides dc termination to the telephone network. 3ignd isolated ground. connects to ground on the line-side interface. also connects to capacitor c2. 4c1b isolation capacitor 1b. connects to one side of isolation capacitor c1. 5rng1 ring 1. connects through a capacitor to the tip lead of the telephone line. provides the ring and caller id signals to the modem. 6rng2 ring 2. connects through a capacitor to the ring le ad of the telephone line. provides the ring and caller id signals to the modem. 7qb transistor base. connects to the base of transistor q3. 8qe transistor emitter. connects to the emitter of transistor q3. 9vreg voltage regulator. connects to an external capacitor to provide bypassing for an internal power supply. 10 vreg2 voltage regulator 2. connects to an external capacitor to provide bypassing for an internal power supply. 11 ref reference. connects to an external resistor to provide a high-accuracy reference current. 12 rext2 external resistor 2. sets the complex ac termination impedance. qe2 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 dct ignd c1b rng1 rng2 qb qe vreg vreg2 ref rext2 rext rx filt filt2 1
si2403 62 rev. 1.2 13 rext external resistor. sets the real ac termination impedance. 14 rx receive input. serves as the receive side input from the telephone network. 15 filt filter. provides filtering for the dc termination circuits. 16 filt2 filter 2. provides filtering for the bias circuits. pin # pin name description
si2403 rev. 1.2 63 10. ordering guide chipset description digital line temperature si2403 commercial si2403-kt si3015-ks 0 to 70 c si2403 commercial pb-free si2403-ft si3015-f-fs 0 to 70 c
si2403 64 rev. 1.2 11. package outline: 24-pin tssop figure 8 illustrates the package details for the si2403. table 16 lists the values for the dimensions shown in the illustration. figure 8. 24-pin thin shrink small outline package (tssop) table 16. package diagram dimensions symbol millimeters typical* min max a ? 1.20 3 a1 0.05 0.15 3 b 0.19 0.30 c 0.09 0.20 3 d7.70 7.90 e 4.30 4.50 e0 . 6 5 b s c h6.40 bsc l 0.45 0.75 t 0 8 3 j 0.10 *note: to guarantee coplanarity ( j ), the parameters marked ?typical? may be exceeded. approximate device weight is 115.7 mg. j e h b d l t c a a1 e
si2403 rev. 1.2 65 12. package outline: 16-pin soic figure 9 illustrates the package details for the si3015. table 17 lists the values for the dimensions shown in the illustration. figure 9. 16-pin small outline inte grated circuit (soic) package table 17. package diagram dimensions symbol millimeters typical* min max a 1.35 1.75 3 a1 .10 .25 3 b.33.51 c.19.25 3 d 9.80 10.00 e 3.80 4.00 e 1.27 bsc ? h 5.80 6.20 h.25.50 l .40 1.27 j ?0.10 t 0o 8o 3 *note: typical parameters are for information purposes only. e h a1 b c h l t e see detail f detail f a 16 9 8 1 gauge plane 0.010 d seating plane j
si2403 66 rev. 1.2 d ocument c hange l ist revision 1.0 to revision 1.1 updated "functional block diagram" on page 1. updated table 6 on page 8. expanded ?+gci country codes? in table 8 on page 21. updated s-registers s43 and s44 in table 13 on page 33. updated default register value for u66. updated u-register u7d. revision 1.1 to revision 1.2 updated "ordering guide" on page 63. updated table 8 on page 21. updated description of i3 command.
si2403 rev. 1.2 67 n otes :
si2403 68 rev. 1.2 c ontact i nformation silicon laboratories inc. 4635 boston lane austin, tx 78735 tel: 1+(512) 416-8500 fax: 1+(512) 416-9669 toll free: 1+(877) 444-3032 email: isoinfo@silabs.com internet: www.silabs.com silicon laboratories, silicon labs, and isomodem are trademarks of silicon laboratories inc. other products or brandnames mentioned herein are trademarks or registered trademarks of their respective holders. the information in this document is believed to be accurate in all respects at the time of publication but is subject to change without notice. silicon laboratories assumes no responsibility for errors and omissions, and disclaims responsib ility for any consequences resu lting from the use of information included herein. additionally, silicon laboratorie s assumes no responsibility for the functioning of undescribed features or parameters. silicon laboratories reserves the right to make changes without further notice . silicon laboratories makes no wa rranty, rep- resentation or guarantee regarding the suitability of its products for any particular purpose, nor does silicon laboratories as sume any liability arising out of the application or use of any product or circuit, and s pecifically disclaims any an d all liability, including wi thout limitation conse- quential or incidental damages. silicon laborat ories products are not designed, intended, or authorized for use in applications intended to support or sustain life, or for any other application in which the failure of the silicon laboratories product could create a s ituation where per- sonal injury or death may occur. should buyer purchase or us e silicon laboratories products for any such unintended or unauthor ized ap- plication, buyer shall indemnify and hold silicon laboratories harmless against all claims and damages.

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